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  descr ip tion the i72110 gpib -chip is the ideal solution to implement a ieee488.2 gpib interface for instruments controlled by a microprocessor . the gpib -asic is designed to meet all of the functional requirements for talker and listener (tl) devices as specified by the ieee standards 488.1-1987 and 488.2-1987. connected between the microprocessor bus and the gpib, the gpib -ic provides high-level management of the gpib to unburden the processor and to simplify both hardware and software design. the i72110 requires only the addition a few external components to implement a talker/listener gpib interface. his t or y the ieee standard 488 describes a "standard digital interface for programmable instrumentation" which, since its introduction in 1975 has become the most popular means of interconnecting instruments and controllers in laboratory , automatic test, and even industrial applications. r efined over several years, the 488-1978 standard, also known as the general purpose interface bus (gpib), is a highly sophisticated standard providing a high degree of of flexibility to meet virtually all instrumentation requirements. the i72110 implements all of the functions that are required to interface to the gpib as a talker or listener device. while it is beyond of the scope of this document to provide a complete explanation of the ieee 488 standard, a basic descriprion follows: the gpib interconnects up to 15 devices over a commom set of data control liners. three types of devices are defined by the standard: talker , listener , and controller , atthough some devices may combine functions such as talker/listener or talker/controller . data on the gpib is transferred in a bit-parallel, byte-serial fashion over eight data i/o lines (/dio[1]-/dio[8]). a three-wire handshake is used to ensure synchronisation of transmission and reception. in order to permit more than one device to receive data at the same time, these control lines are "open collector" so that the slowest device controls the data rate. a number of other control lines perform a variety of functions such as device addressing, interrupt generation and so forth. the i72110 implements all functional aspects of talker and listener as defined by the 488.1-1987 standard on a single chip. a dv ance inf or mation dat ashee t i7 2 1 1 0 i7 2 1 1 0 p t o gpib int er f ace asic f eatur es ? t alk er/lis t ener int er f ace f or ins tr ument ation de vices ? micr opr ocessor bus int er f ace wit h 5.0 vio ? nec pd7 2 1 0 com patible r egis t er la y out ? 1 00 pin tqfp pac k ag e ? r ohs conf or mant (pb-fr ee) xsl ? fo renderx i n e s
specif ications gpib capabilities ieee 488. 1 capabilities : ah1 , sh1 , t/te5, l/le3, sr1 , rl1 , pp1/pp2, dc1 , d t1 , c0 gpib handshak e r at e : > 1mb yt es/sec en vir onment al and ph y sical p ac k ag e : 1 00 tqfp , 1 6.0 mm x 1 6.0 mm x 1 .6 mm s t or ag e t em per atur e : -2080c ambient t em per atur e : -070c or der ing inf or mation i7 2 1 1 0-33 - t r a y of tb a units on t he w eb clic k www .inesinc.com f or mor e inf ormation and r esour ces. this document contains information on products under development by ines. the information is intended to help you evaluate this product. ines reserves ines t es t and measur ement gmbh & co. k g the right to change oder discontinue work on this proposes product without notice. all specifications are subject to change without notice. copyright ? 2005. all rights reserved. 3 1 5 42 bad nenndor f de (german y) phone +49 5 7 23 9 1 6 250 f ax +49 5 7 23 9 1 6 252 w eb www .inesinc.com a dv ance inf or mation dat ashee t i7 2 1 1 0 (cont.) xsl ? fo renderx i n e s i n e s


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